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FUJITSU SEMICONDUCTOR DATA SHEET
DS07-12506-4E
8-bit Proprietary Microcontroller
CMOS
F2MC-8L MB89150/150A Series
MB89151/151A/152/152A/153/153A/154/154A/155/155A MB89P155/PV150
s DESCRIPTION
The MB89150/A series has been developed as general-purpose version of the F2MC*-8L family consisting of proprietary 8-bit, single-chip microcontrollers. In addition to a compact instruction set, the MB89150 series microcontrollers contain a variety of peripheral functions such as dual-clock control system, five operating speed control stages, timers, a serial interface, a remote control transmission output, external interrupts, an LCD controller/driver, an LCD booster, and a watch prescaler. *: F2MC stands for FUJITSU Flexible Microcontroller.
s FEATURES
* * * * * * * * * * F2MC-8L family CPU core Dual-clock system High-speed processing at low voltage Minimum execution time: 0.95 s/2.7 V, 1.33 s/2.2 V I/O ports: max. 43 channels 21-bit time-base timer 8/16-bit timer/counter: 1 channel (8 bits x 2 channels) 8-bit serial I/O: 1 channel LCD controller/driver: Max. 36 segments x 4 commons (built-in booster) Remote control transmission output
(Continued)
s PACKAGE
80-pin Plastic QFP 80-pin Plastic LQFP 80-pin Plastic LQFP 80-pin Ceramic MQFP
(FPT-80P-M06)
(FPT-80P-M11)
(FPT-80P-M05)
(MQP-80C-P01)
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MB89150/150A Series
(Continued) * Buzzer output * Watch prescaler (15 bits) * External interrupts (wake-up function) Four independent channels with edge detection function plus eight level-interrupt channels
s PRODUCT LINEUP
Part number Parameter
MB89151/A MB89152/A MB89153/A MB89154/A MB89155/A MB89P155 MB89PV150 One-time PROM product
Piggyback/ evaluation product (for evaluation and development)
Classification Mass production products (mask ROM products) ROM size
4 K x 8 bits 6 K x 8 bits 8 K x 8 bits 12 K x 8 bits 16 K x 8 bits 16 K x 8 bits 32 K x 8 bits (internal (internal (internal (internal (internal (internal (external mask ROM) mask ROM) mask ROM) mask ROM) mask ROM) PROM, ROM)
programming with generalpurpose EPROM programmer)
RAM size CPU functions
128 x 8 bits Number of instructions: Instruction bit length: Instruction length: Data bit length: Minimum execution time: Interrupt processing time: I/O port (N-ch open-drain):
256 x 8 bits 136 8 bits 1 to 3 bytes 1, 8, 16 bits 0.95 s/4.2 MHz 8.57 s/4.2 MHz
512 x 8 bits
Ports
8 (6 ports also serve as peripherals, 3 ports are a high-current drive type.) Output port (N-ch open-drain): 18 (16 ports also serve as segment pins, 2 ports serve as boost capacitor connection pins.)*1 I/O port (CMOS): 16 (12 ports also serve as an external interrupt.) Output port (CMOS): 1 (Also serves as a remote control.) Total: 43 (max.) 8-bit timer counter x 2 channel or 16-bit event counter x 1 channel 8 bits LSB first/MSB first selectability Common output: Segment output: Bias power supply pins: LCD display RAM size: Booster for LCD driving: Dividing resistor for LCD driving: 4 32 (max.)*1 4 36 x 4 bits Built-in*1 Built-in (an external resistor selectability) 4 (edge selectability) 8 (level interrupt only) 1 (7 frequencies are selectable by the software.) No reference voltage generator and booster for LCD driving
Timer/counter 8-bit serial I/O LCD controller/ driver
External interrupts
(wake-up function)
Buzzer output
(Continued)
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MB89150/150A Series
(Continued)
Part number Parameter
MB89151/A MB89152/A MB89153/A MB89154/A MB89155/A MB89P155 MB89PV150
Remote control transmission output Standby modes Process
Operating voltage*2
1 (Pulse width and cycle are software selectable.) Sleep mode, stop mode, and watch mode CMOS 2.2 V to 6.0 V (single clock)/2.2 V to 4.0 V (dual clock) 2.7 V to 6.0 V
MBM27C256A -20TV (LCC package)
EPROM for use
*1: Selected by the mask option. See section "s Mask Options." *2: Varies with conditions such as the operating frequency and the connected ICE. (See section "s Electrical Characteristics.")
s PACKAGE AND CORRESPONDING PRODUCTS
Package MB89151/A MB89152/A MB89153/A MB89154/A MB89155/A MB89P155 MB89PV150 x x x x x
FPT-80P-M06 FPT-80P-M11 FPT-80P-M05 MQP-80C-P01 : Available
x : Not available
Note: For more information about each package, see section "s Package Dimensions."
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MB89150/150A Series
s DIFFERENCES AMONG PRODUCTS
1. Memory Size
Before evaluating using the piggyback product, verify its differences from the product that will actually be used. Take particular care on the following points: * On the MB89151/A, addresses 0140H and later of the register bank cannot be used. On the MB89152/A, 153/A, 154/A, 155/A, and MB89P155, addresses 0180H and later of each register bank cannot be used. * On the MB89P155, addresses BFF0H to BFF6H comprise the option setting area, option settings can be read by reading these addresses. * The stack area, etc., is set at the upper limit of the RAM.
2. Current Consumption
* In the case of the MB89PV150, add the current consumed by the EPROM which is connected to the top socket. * When operated at low speed, the product with an OTPROM (one-time PROM) or an EPROM will consume more current than the product with a mask ROM. However, the current consumption in sleep/stop modes is the same. (For more information, see sections "s Electrical Characteristics" and "s Example Characteristics.")
3. Mask Options
Functions that can be selected as options and how to designate these options vary by the product. Before using options check section "s Mask Options." Take particular care on the following point: * On the MB89PV150, options are fixed, except for the segment output selection.
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MB89150/150A Series
s PIN ASSIGNMENT
(Top view)
P43/SEG23*4 P44/SEG24*4 P45/SEG25*4 P46/SEG26*4 P47/SEG27*4 P50/SEG28*4 P51/SEG29*4 P52/SEG30*4 P53/SEG31*4 P54/SEG32*4 P55/SEG33*4 P56/SEG34*4 VSS P57/SEG35*4 X1 X0 MOD1 MOD0 RST P00/INT20
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
P42/SEG22*4 P41/SEG21*4 P40/SEG20*4 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3
SEG2 SEG1 SEG0 COM3 COM2 COM1 COM0 VCC V3 V2 V1 V0 P32*2/C0*1 P31*2/C1*1 P30/RCO X1A X0A P27/BUZ*3 P26*3 P25/SCK
*1: For products with a booster circuit *2: For products without a booster circuit *3: N-ch open-drain high-current drive type *4: Selected using the mask option (in units of 4 pins)
P01/INT21 P02/INT22 P03/INT23 P04/INT24 P05/INT25 P06/INT26 P07/INT27 P10/INT10 P11/INT11 P12/INT12 P13/INT13 P14 P15 P16 P17 P20/EC P21*3 P22/TO P23/SI P24/SO (FPT-80P-M05)
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MB89150/150A Series
(Top view)
P43/SEG23*4 P44/SEG24*4 P45/SEG25*4 P46/SEG26*4 P47/SEG27*4 P50/SEG28*4 P51/SEG29*4 P52/SEG30*4 P53/SEG31*4 P54/SEG32*4 P55/SEG33*4 P56/SEG34*4 VSS P57/SEG35*4 X1 X0 MOD1 MOD0 RST P00/INT20
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
P42/SEG22*4 P41/SEG21*4 P40/SEG20*4 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3
SEG2 SEG1 SEG0 COM3 COM2 COM1 COM0 V CC V3 V2 V1 V0 P32*2/C0*1 P31*2/C*1 P30/RCO X1A X0A P27/BUZ*3 P26*3 P25/SCK
*1: For products with a booster circuit *2: For products without a booster circuit *3: N-ch open-drain high-current drive type *4: Selected using the mask option (in units of 4 pins)
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P01/INT21 P02/INT22 P03/INT23 P04/INT24 P05/INT25 P06/INT26 P07/INT27 P10/INT10 P11/INT11 P12/INT12 P13/INT13 P14 P15 P16 P17 P20/EC P21*3 P22/TO P23/SI P24/SO (FPT-80P-M11)
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MB89150/150A Series
(Top view)
P41/SEG21*4 P42/SEG22*4 P43/SEG23*4 P44/SEG24*4 P45/SEG25*4 P46/SEG26*4 P47/SEG27*4 P50/SEG28*4 P51/SEG29*4 P52/SEG30*4 P53/SEG31*4 P54/SEG32*4 P55/SEG33*4 P56/SEG34*4 VSS P57/SEG35*4 X1 X0 MOD1 MOD0 RST P00/INT20 P01/INT21 P02/INT22
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
P40/SEG20*4 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5
SEG4 SEG3 SEG2 SEG1 SEG0 COM3 COM2 COM1 COM0 V CC V3 V2 V1 V0 P32*2/C0*1 P31*2/C1*1 P30/RCO X1A X0A P27/BUZ*3 P26*3 P25/SCK P24/SO P23/SI
*1: For products with a booster circuit *2: For products without a booster circuit *3: N-ch open-drain high-current drive type *4: Selected using the mask option (in units of 4 pins)
P03/INT23 P04/INT24 P05/INT25 P06/INT26 P07/INT27 P10/INT10 P11/INT11 P12/INT12 P13/INT13 P14 P15 P16 P17 P20/EC P21*3 P22/TO (FPT-80P-M06)
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MB89150/150A Series
P41/SEG21*2 P42/SEG22*2 P43/SEG23*2 P44/SEG24*2 P45/SEG25*2 P46/SEG26*2 P47/SEG27*2 P50/SEG28*2 P51/SEG29*2 P52/SEG30*2 P53/SEG31*2 P54/SEG32*2 P55/SEG33*2 P56/SEG34*2 VSS P57/SEG35*2 X1 X0 MOD1 MOD0 RST P00/INT20 P01/INT21 P02/INT22
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
P40/SEG20*2 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5
(Top view)
101 102 103 104 105 106 107 108 109
93 92 91 90 89 88 87 86 85
SEG4 SEG3 SEG2 SEG1 SEG0 COM3 COM2 COM1 COM0 VCC V3 V2 V1 V0 P32 P31 P30/RCO X1A X0A P27/BUZ*1 P26*1 P25/SCK P24/SO P23/SI
*1: N-ch open-drain high-current drive type *2: Selected using the mask option (in units of 4 pins).
* Pin assignment on package top Pin no. 81 82 83 84 85 86 87 88 Pin name N.C. VPP A12 A7 A6 A5 A4 A3 Pin no. 89 90 91 92 93 94 95 96 Pin name A2 A1 A0 N.C. O1 O2 O3 VSS Pin no. 97 98 99 100 101 102 103 104 Pin name N.C. O4 O5 O6 O7 O8 CE A10 Pin no. 105 106 107 108 109 110 111 112 Pin name OE N.C. A11 A9 A8 A13 A14 VCC
N.C.: Internally connected. Do not use. 8
P03/INT23 P04/INT24 P05/INT25 P06/INT26 P07/INT27 P10/INT10 P11/INT11 P12/INT12 P13/INT13 P14 P15 P16 P17 P20/EC P21*1 P22/TO (MQP-80C-P01)
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
110 111 112 81 82 83 84
100 99 98 97 96 95 94
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MB89150/150A Series
s PIN DESCRIPTION
Pin no. LQFP*1*3 16 15 18 17 19 MQFP*4 QFP*2 18 17 20 19 21 X0 X1 MOD0 MOD1 RST D C Operating mode selection pins Connect directly to VSS. Reset I/O pin This pin is an N-ch open-drain output type with a pullup resistor and a hysteresis input type. "L" is output from this pin by an internal reset source. The internal circuit is initialized by the input of "L". General-purpose I/O ports Also serve as an external interrupt 2 input (wake-up function). External interrupt 2 input is hysteresis input. General-purpose I/O ports Also serve as external interrupt 1 input. External interrupt 1 input is hysteresis input. General-purpose I/O ports N-ch open-drain general-purpose I/O port Also serves as the external clock input for the timer. The peripheral is a hysteresis input type. N-ch open-drain general-purpose I/O port N-ch open-drain general-purpose I/O port Also serves as a timer output. N-ch open-drain general-purpose I/O port Also serves as the data input for the 8-bit serial I/O. The peripheral is a hysteresis input type. N-ch open-drain general-purpose I/O port Also serves as the data output for the 8-bit serial I/O. N-ch open-drain general-purpose I/O port Also serves as the clock I/O for the 8-bit serial I/O. The peripheral is a hysteresis input type. N-ch open-drain general-purpose I/O port N-ch open-drain general-purpose I/O port Also serves as a buzzer output. Pin name Circuit type A Function Main clock oscillator pins
20 to 27
22 to 29
P00/INT20 to P07/INT27
E
28 to 31
30 to 33
P10/INT10 to P13/INT13 P14 to P17 P20/EC
E
32 to 35 36
34 to 37 38
F H
37 38 39
39 40 41
P21 P22/TO P23/SI
I I H
40 41
42 43
P24/SO P25/SCK
I H
42 43 *1: *2: *3: *4:
44 45
P26 P27/BUZ
I I
FPT-80P-M11 FPT-80P-M06 FPT-80P-M05 MQP-80C-P01
(Continued)
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MB89150/150A Series
(Continued) Pin no.
LQFP*1*3 48 MQFP*4 QFP*2 50 Pin name P32 C0 47 49 P31 C1 46 14 12 to 6 5 to 1 80, 79, 78 77 to 58 57 to 54 52 to 49 44 45 53 13 *1: *2: *3: *4: 48 16 14 to 8 7 to 3 2, 1, 80 79 to 60 59 to 56 54 to 51 46 47 55 15 P30/RCO P57/SEG35 P56/SEG34 to P50/SEG28 P47/SEG27 to P43/SEG23 P42/SEG22, P41/SEG21, P40/SEG20 SEG19 to SEG0 COM3 to COM0 V3 to V0 X0A X1A VCC VSS -- -- Power supply pin Power supply (GND) pin K K -- B LCD controller/driver segment output-only pins LCD controller/driver common output-only pins LCD driving power supply pins Subclock crystal oscillator pins (32.768 kHz) J/K
Circuit type J -- J -- G J/K
Function Functions as an N-ch open-drain general-purpose output port only in the products without a booster. Functions as a capacitor connection pin in the products with a booster. Functions as an N-ch open-drain general-purpose output port only in the products without a booster. Functions as a capacitor connection pin in the products with a booster. General-purpose output-only port Also serves as a remote control transmission output. N-ch open-drain general-purpose output ports Also serve as LCD controller/driver segment output. Switching between port and common output is done by the mask option.
FPT-80P-M11 FPT-80P-M06 FPT-80P-M05 MQP-80C-P01
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MB89150/150A Series
* External EPROM pins (MB89PV150 only) Pin no. 82 83 84 85 86 87 88 89 90 91 93 94 95 96 98 99 100 101 102 103 104 105 107 108 109 110 111 112 81 92 97 106 Pin name VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 VSS O4 O5 O6 O7 O8 CE A10 OE A11 A9 A8 A13 A14 VCC N.C. I/O O O "H" level output pin Address output pins Function
I
Data input pins
O I
Power supply (GND) pin Data input pins
O O O O
ROM chip enable pin Outputs "H" during standby. Address output pin ROM output enable pin Outputs "L" at all times. Address output pins
O O O -- EPROM power supply pin Internally connected pins Be sure to leave them open.
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MB89150/150A Series
s I/O CIRCUIT TYPE
Type A
X1
Circuit
Remarks Crystal or ceramic oscillation type (main clock) * At an oscillation feedback resistor of approximately 1 M/5.0 V
X0
Standby control signal
X1
CR oscillation type (main clock) (except MB89PV150/P155)
X0
Standby control signal
B
X1A
X0A
Crystal oscillation type (subclock) * At an oscillation feedback resistor of approximately 4.5 M/3.0 V
Standby control signal
C
D
R P-ch
* At output pull-up resistor (P-ch) of approximately 50 k/5.0 V * Hysteresis input
N-ch
E
R P-ch P-ch
* CMOS I/O * The peripheral is a hysteresis input type.
N-ch Port Peripheral
* Pull-up resistor optional (except MB89PV150)
(Continued)
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MB89150/150A Series
(Continued)
Type F
R P-ch P-ch
Circuit * CMOS I/O
Remarks
N-ch
* Pull-up resistor optional (except MB89PV150) G
P-ch
* CMOS output * P-ch output is a high-current drive type.
N-ch
H
R
P-ch
* N-ch open-drain I/O * CMOS input * The peripheral is a hysteresis input type.
N-ch Port Peripheral
* Pull-up resistor optional (except MB89PV150/P155) * N-ch open-drain I/O * CMOS input * P21, P26, and P27 are a high-current drive type.
I
R P-ch
N-ch
* Pull-up resistor optional (except MB89PV150/P155) J
R P-ch
* N-ch open-drain output * Pull-up resistor optional (except MB89PV150/P155) * P31 and P32 are not provided with a pull-up resistor.
N-ch
K
P-ch N-ch
* LCD controller/driver segment output
P-ch N-ch
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MB89150/150A Series
s HANDLING DEVICES
1. Preventing Latchup
Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input and output pins other than medium- to high-voltage pins or if higher than the voltage which shows on "1. Absolute Maximum Ratings" in section "s Electrical Characteristics" is applied between VCC and VSS. When latchup occurs, power supply current increases rapidly and might thermally damage elements. When using, take great care not to exceed the absolute maximum ratings. Also, take care to prevent the analog power supply (AVCC and AVR) and analog input from exceeding the digital power supply (VCC) when the analog system power supply is turned on and off.
2. Treatment of Unused Input Pins
Leaving unused input pins open could cause malfunctions. They should be connected to a pull-up or pull-down resistor.
3. Treatment of Power Supply Pins on Microcontrollers with A/D and D/A Converters
Connect to be AVCC = DAVC = VCC and AVSS = AVR = VSS even if the A/D and D/A converters are not in use.
4. Treatment of N.C. Pins
Be sure to leave (internally connected) N.C. pins open.
5. Power Supply Voltage Fluctuations
Although VCC power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage could cause malfunctions, even if it occurs within the rated range. Stabilizing voltage supplied to the IC is therefore important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluctuations (P-P value) will be less than 10% of the standard VCC value at the commercial frequency (50 to 60 Hz) and the transient fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power is switched.
6. Precautions when Using an External Clock
Even when an external clock is used, oscillation stabilization time is required for power-on reset (optional) and wake-up from stop mode.
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MB89150/150A Series
s PROGRAMMING TO THE EPROM ON THE MB89P155
The MB89P155 is an OTPROM version of the MB89150/A series.
1. Features
* 16-Kbyte PROM on chip * Options can be set using the EPROM programmer. * Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer)
2. Memory Space
Memory space in the EPROM mode is diagrammed below.
Address 0000H 0080H 0180H
Normal operating mode
EPROM mode (Corresponding addresses on the EPROM programmer) 0000H
I/O RAM Vacancy (Read value FFH)
Not available 8000H
3FF0H Option area 3FF6H
Not available Vacancy (Read value FFH) C000H 4000H
PROM
Program area (EPROM)
FFFFH
7FFFH
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MB89150/150A Series
3. Programming to the EPROM
In EPROM mode, the MB89P155 functions equivalent to the MBM27C256A. This allows the PROM to be programmed with a general-purpose EPROM programmer (the electronic signature mode cannot be used) by using the dedicated socket adapter. * Programming procedure (1) Set the EPROM programmer to the MBM27C256A. (2) Load program data into the EPROM programmer at 4000H to 7FFFH (note that addresses C000H to FFFFH while operating as a normal operating mode assign to 4000H to 7FFFH in EPROM mode). Load option data into addresses 3FF0H to 3FF5H of the EPROM programmer. (For information about each corresponding option, see "7. Setting OTPROM Options.") (3) Program with the EPROM programmer.
4. Recommended Screening Conditions
High-temperature aging is recommended as the pre-assembly screening procedure for a product with a blanked OTPROM microcomputer program.
Program, verify
Aging +150C, 48 Hrs.
Data verification
Assembly
5. Programming Yield
All bits cannot be programmed at Fujitsu shipping test to a blanked OTPROM microcomputer, due to its nature. For this reason, a programming yield of 100% cannot be assured at all times.
6. EPROM Programmer Socket Adapter
Package FPT-80P-M05 FPT-80P-M06 FPT-80P-M11 Compatible socket adapter ROM-80SQF-28DP-8L ROM-80QF-28DP-8L3 ROM-80QF2-28DP-8L2
Inquiry: Sun Hayato Co., Ltd.: TEL 81-3-3802-5760
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MB89150/150A Series
7. Setting OTPROM Options
The programming procedure is the same as that for the PROM. Options can be set by programming values at the addresses shown on the memory map. The relationship between bits and options is shown on the following bit map: * OTPROM option bit map Bit 7 Vacancy 3FF0H Readable P07 Pull-up 3FF1H 1: No 0: Yes P17 Pull-up 3FF2H 1: No 0: Yes Vacancy 3FF3H Readable Vacancy 3FF4H Readable Vacancy 3FF5H Readable Bit 6 Vacancy Readable P06 Pull-up 1: No 0: Yes P16 Pull-up 1: No 0: Yes Vacancy Readable Vacancy Readable Vacancy Readable Bit 5 Bit 4 Bit 3 Bit 2 Reset pin output 1: Yes 0: No P02 Pull-up 1: No 0: Yes P12 Pull-up 1: No 0: Yes Vacancy Readable Vacancy Readable Vacancy Readable Bit 1 Bit 0
Oscillation stabilization time Vacancy
WTM1 WTM0 See section "s Mask Options." P05 Pull-up 1: No 0: Yes P15 Pull-up 1: No 0: Yes Vacancy Readable Vacancy Readable Vacancy Readable P04 Pull-up 1: No 0: Yes P14 Pull-up 1: No 0: Yes Vacancy Readable Vacancy Readable Vacancy Readable
Readable P03 Pull-up 1: No 0: Yes P13 Pull-up 1: No 0: Yes Vacancy Readable Vacancy Readable Vacancy Readable
Clock mode Power-on selection reset 1: Dual clock 1: Yes 0: Single clock 0: No P01 Pull-up 1: No 0: Yes P11 Pull-up 1: No 0: Yes Vacancy Readable Vacancy Readable Vacancy Readable P00 Pull-up 1: No 0: Yes P10 Pull-up 1: No 0: Yes Vacancy Readable Vacancy Readable Vacancy Readable
Notes: * Set each bit to 1 to erase. * Do not write 0 to the vacant bit. The read value of the vacant bit is 1, unless 0 is written to it.
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MB89150/150A Series
s PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE
1. EPROM for Use
MBM27C256A-20TV
2. Programming Socket Adapter
To program to the PROM using an EPROM programmer, use the socket adapter (manufacturer: Sun Hayato Co., Ltd.) listed below. Package LCC-32(Rectangle) LCC-32(Square) Adapter socket part number ROM-32LC-28DP-YG ROM-32LC-28DP-S
Inquiry: Sun Hayato Co., Ltd.: TEL 81-3-3802-5760
3. Memory Space
Memory space in each mode is diagrammed below.
Address 0000H 0080H 0280H I/O RAM Normal operating mode Corresponding addresses on the EPROM programmer 0000H
Not available 8000H EPROM 32 KB
PROM 32 KB
FFFFH
7FFFH
4. Programming to the EPROM
(1) Set the EPROM programmer to the MBM27C256A. (2) Load program data into the EPROM programmer at 4000H to 7FFFH. (3) Program to 0000H to 7FFFH with the EPROM programmer.
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MB89150/150A Series
s BLOCK DIAGRAM
X0 X1
Main clock oscillator Clock controller
21-bit time-base timer
8-bit timer/counter X0A X1A Subclock oscillator (32.768 kHz) Internal bus
P22/TO
8-bit timer/counter
Port 2
P20/EC
RST
Reset circuit (WDT) 8-bit serial I/O 8 Port 0 8
P25/SCK P24/SO P23/SI
P00/INT20 to P07/INT27
External interrupt 2 (wake-up function) CMOS I/O port
Buzzer output 2 N-ch open-drain I/O port
P27/BUZ*4 P21*4,P26*4 4 P54/SEG32*3 to P57/SEG35*3 P50/SEG28*3 to P53/SEG31*3 P44/SEG24*3 to P47/SEG27*3 P40/SEG20*3 to P43/SEG23*3 20 SEG0 to SEG19 4 COM0 to COM3
4 Port 1 P10/INT10 to P13/INT13 4 P14 to P17
4 External interrupt 1 (wake-up function) CMOS I/O port RAM ( M ax . 256 x 8bit s ) F 2 M C- 8L CPU LCD controller/ driver N-ch open-drain output port Port 4 and port 5 16
4 4 4
RO M ( M ax . 16 K x 8 bit s )
36 x 4 bits VRAM Reference voltage generator and booster*1 Remote control output N-ch open-drain output port (Only P30 is a CMOS output type.)
4 V0 to V3
Other pins M O D0, M O D1, V CC, V SS
Port 3
P32/C0*2 P31/C1*2 P30/RCO
*1: Selected by mask option *2: Used as ports without a reference voltage generator and booster *3: Functions selected by mask option *4: N-ch open-drain high-current drive type
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MB89150/150A Series
s CPU CORE
1. Memory Space
The microcontrollers of the MB89150/A series offer a memory space of 64 Kbytes for storing all of I/O, data, and program areas. The I/O area is located at the lowest address. The data area is provided immediately above the I/O area. The data area can be divided into register, stack, and direct areas according to the application. The program area is located at exactly the opposite end, that is, near the highest address. Provide the tables of interrupt reset vectors and vector call instructions toward the highest address within the program area. The memory space of the MB89150/A series is structured as illustrated below. Memory Space
MB89155/A MB89P155 0000H 0080H I/O
MB89PV150 0000H 0080H I/O RAM 512 B 0100H
Register
MB89151/A 0000H 0080H Not available 00C0H RAM 128 B 0100H
Register
MB89152/A 0000H 0000H I/O 0080H 0080H
MB89153/A I/O
I/O
MB89154/A 0000H I/O 0080H RAM 256 B
Register
0100H 0180H
RAM 256 B
Register
0100H 0180H
RAM 256 B
Register
0100H 0180H
0100H 0180H
RAM 256 B
Register
0140H 0200H
0280H Not available 8000H Not available Not available Not available Not available Not available
External ROM 32 KB D000H E000H E800H F000H FFFFH FFFFH ROM 4 KB FFFFH ROM 6 KB FFFFH ROM 8 KB FFFFH ROM 12 KB
C000H
ROM 16 KB FFFFH
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MB89150/150A Series
2. Registers
The F2MC-8L family has two types of registers; dedicated registers in the CPU and general-purpose registers in the memory. The following dedicated registers are provided:
Program counter (PC): Accumulator (A): Temporary accumulator (T): Index register (IX): Extra pointer (EP): Stack pointer (SP): Program status (PS):
A 16-bit register for indicating instruction storage positions A 16-bit temporary register for storing arithmetic operations, etc. When the instruction is an 8-bit data processing instruction, the lower byte is used. A 16-bit register which performs arithmetic operations with the accumulator When the instruction is an 8-bit data processing instruction, the lower byte is used. A 16-bit register for index modification A 16-bit pointer for indicating a memory address A 16-bit register for indicating a stack area A 16-bit register for storing a register pointer, a condition code
16 bits PC A T IX EP SP PS : Program counter : Accumulator : Temporary accumulator : Index register : Extra pointer : Stack pointer : Program status
Initial value FFFDH Undefined Undefined Undefined Undefined Undefined I-flag = 0, IL1, 0 = 11 Other bits are undefined.
The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for use as a condition code register (CCR). (See the diagram below.)
Structure of the Program Status Register
15 PS
14
13 RP
12
11
10
9
8
7 H
6 I
5
4
3 N
2 Z
1 V
0 C
Vacancy Vacancy Vacancy
IL1, 0
RP
CCR
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MB89150/150A Series
The RP indicates the address of the register bank currently in use. The relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. Rule for Conversion of Actual Addresses of the General-purpose Register Area
RP
Lower OP codes b1 b0
"0" "0" "0" "0" "0" "0" "0" "1" R4 R3 R2 R1 R0 b2
Generated addresses A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and bits for control of CPU operations at the time of an interrupt. H-flag: Set when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared otherwise. This flag is for decimal adjustment instructions. I-flag: IL1, 0: Interrupt is allowed when this flag is set to 1. Interrupt is prohibited when the flag is set to 0. Set to 0 when reset. Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is higher than the value indicated by this bit.
IL1 0 0 1 1
IL0 0 1 0 1
Interrupt level 1 2 3
High-low High
Low = no interrupt
N-flag: Set if the MSB is set to 1 as the result of an arithmetic operation. Cleared when the bit is set to 0. Z-flag: V-flag: Set when an arithmetic operation results in 0. Cleared otherwise. Set if the complement on 2 overflows as a result of an arithmetic operation. Reset if the overflow does not occur.
C-flag: Set when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared otherwise. Set to the shift-out value in the case of a shift instruction.
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MB89150/150A Series
The following general-purpose registers are provided: General-purpose registers: An 8-bit register for storing data The general-purpose registers are 8 bits and located in the register banks of the memory. One bank contains eight registers. Up to a total of 8 banks can be used on the MB89151 (RAM 128 x 8 bits), and a total of 16 banks can be used on the MB89152/3/4/5 (RAM 256 x 8 bits). The bank currently in use is indicated by the register bank pointer (RP). Note: The number of register banks that can be used varies with the RAM size. Register Bank Configuration
This address = 0100H + 8 x (RP) R0 R1 R2 R3 R4 R5 R6 R7 8 banks (MB89151) 16 banks (MB89152/3/4/5)
Memory area
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MB89150/150A Series
s I/O MAP
Address 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH 1DH 1EH to 2FH (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) T2CR T1CR T2DR T1DR SMR1 SDR1 (R/W) (R/W) RCR1 RCR2 (R/W) (R/W) (R/W) PDR4 PDR5 BZCR (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) SYCC STBC WDTC TBTC WPCR PDR3 Read/write (R/W) (W) (R/W) (W) (R/W) (W) Register name PDR0 DDR0 PDR1 DDR1 PDR2 DDR2 Register description Port 0 data register Port 0 data direction register Port 1 data register Port 1 data direction register Port 2 data register Port 2 data direction register Vacancy System clock control register Standby control register Watchdog timer control register Time-base timer control register Watch prescaler control register Port 3 data register Vacancy Port 4 data register Port 5 data register Buzzer register Vacancy Vacancy Vacancy Remote control transmission register 1 Remote control transmission register 2 Vacancy Vacancy Timer 2 control register Timer 1 control register Timer 2 data register Timer 1 data register Serial mode register Serial data register Vacancy
(Continued)
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MB89150/150A Series
(Continued)
Address 30H 31H 32H 33H 34H to 5FH 60H to 71H 72H 73H to 7BH 7CH 7DH 7EH 7FH Note: Do not use vacancies. (W) (W) (W) ILR1 ILR2 ILR3 (R/W) (R/W) VRAM LCR1 Read/write (R/W) (R/W) (R/W) (R/W) Register name EIE1 EIF1 EIE2 EIF2 Register description External interrupt 1 enable register External interrupt 1 flag register External interrupt 2 enable register External interrupt 2 flag register Vacancy Display data RAM LCD controller/driver control register 1 Vacancy Interrupt level setting register 1 Interrupt level setting register 2 Interrupt level setting register 3 Vacancy
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MB89150/150A Series
s ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings
( VSS = 0.0 V)
Parameter Power supply voltage
Symbol VCC
Value Min. VSS - 0.3 VSS - 0.3 Max. VSS + 7.0 VSS + 7.0 VCC + 0.3 VCC + 0.3 VSS + 7.0
Unit V V V V V
Remarks
LCD power supply voltage
V0 to V3 VSS - 0.3 VI1 VSS - 0.3 VSS - 0.3
V0 to V3 pins on the product with booster V0 to V3 pins on the product without booster VI1 must not exceed VSS +7.0 V. All pins except P20 to P27 without a pull-up resistor P20 to P27 without a pull-up resistor VO1 must not exceed VSS +7.0 V. All pins except P20 to P27, P31, P32, P40 to P47, P50 to P57 without a pull-up resistor P20 to P27, P31, P32, P40 to P47, and P50 to P57, without a pull-up resistor All pins except P21, P26, P27, and power supply pins P21, P26, and P27 Average value (operating current x operating rate) All pins except P21, P26, P27, and power supply pins. Average value (operating current x operating rate) P21, P26, and P27
Input voltage VI2
VO1 Output voltage VO2 IOL1 IOL2 IOLAV1 "L" level average output current IOLAV2 "L" level total maximum output current "L" level total average output current "H" level maximum output current IOL IOLAV IOH1 IOH2
VSS - 0.3
VCC + 0.3
V
VSS - 0.3 -- -- --
VSS + 7.0 10 20 4
V mA mA mA
"L" level maximum output current
-- -- -- -- --
8 80 40 -5 -10
mA mA mA mA mA
Average value (operating current x operating rate) All pins except P30 and power supply pins P30
(Continued)
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MB89150/150A Series
(Continued)
(VSS = 0.0 V)
Parameter
Symbol
Value Min. -- Max. -2
Unit
Remarks Average value (operating current x operating rate) All pins except P30 and power supply pins. Average value (operating current x operating rate) P30 Average value (operating current x operating rate)
IOHAV1 "H" level average output current IOHAV2 "H" level total output current "H" level total average output current Power consumption Operating temperature Storage temperature IOH IOHAV PD TA Tstg
mA
-- -- -- -- -40 -55
-4 -20 -10 300 +85 +150
mA mA mA mW C C
Precautions: Permanent device damage may occur if the above "Absolute Maximum Ratings" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2. Recommended Operating Conditions
(VSS = 0.0 V) Parameter Symbol Value Min. 2.2*1 Max. 6.0 Unit Remarks Normal operation assurance range Single clock system of the mask ROM product. Normal operation assurance range Dual-clock system of the mask ROM product. MB89P155/PV150 Retains the RAM state in stop mode V0 to V3 pins V1 pin on the products with a booster Reference power external input
V
Power supply voltage
VCC
2.2*1 2.7*1 1.5
4.0 6.0 6.0 VCC*2 2.2 +85
V V V V V C
LCD power supply voltage LCD reference power supply input voltage Operating temperature
V0 to V3 VIR TA
VSS 1.3 -40
*1: The minimum operating power supply voltage varies with the execution time (instruction cycle time) setting for the operating frequency. *2: The LCD power supply voltage range and optimum value vary depending on the characteristics of the liquidcrystal display element.
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MB89150/150A Series
6
5
Operating voltage (V)
4
Operation assurance range
3
2
1
1 2 3 4 Main clock operating frequency (at an instruction cycle of 4/Fc) (MHz) 4.0 2.0 Minimum execution time (instruction cycle) (s) 1.0
5
0.8
Note: The shaded area is assured only for the MB89151/A, 152/A, 153/A, 154/A, and MB89155/A.
Figure 1 Operating Voltage vs. Main Clock Operating Frequency (MB89P155/PV150, and single-clock MB89151/A, 152/A, 153/A, 154/A, and MB89155/A)
6
5
Operating voltage (V)
4 Operation assurance range 3
2
1
1 2 3 4 Main clock operating frequency (at an instruction cycle of 4/Fc) (MHz)
5
4.0 2.0 Minimum execution time (instruction cycle) (s)
1.0
0.8
Figure 2 Operating Voltage vs. Main Clock Operating Frequency (Dual-clock MB89151/A, 152/A, 153/A, 154/A, and MB89155/A) Figures 1 and 2 indicate the operating frequency of the external oscillator at a minimum execution time of 4/FCH. Since the operating voltage range is dependent on the minimum execution time, see the minimum execution time if the operating speed is switched using a gear. 28
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MB89150/150A Series
3. DC Characteristics
(VCC = +5.0 V, VSS = 0.0 V, TA = -40C to +85C)
Parameter
Symbol
Pin P00 to P07, P10 to P17, P20 to P27
RST, MOD0, MOD1,
Condition
Value Min. 0.7 VCC Typ. Max.
VCC + 0.3
Unit
Remarks
VIH "H" level input voltage VIHS
V
CMOS input
EC, SI, SCK, INT10 to INT13, INT20 to INT27
P00 to P07, P10 to P17,
0.8 VCC
VSS + 0.3
V
Hysteresis input CMOS input Hysteresis input Without pull-up resistor
VIL "L" level input voltage
P20 to P27
RST, MOD0, MOD1,
--
VSS - 0.3 VSS - 0.3

0.3 VCC
V
VILS
EC, SI, SCK, INT10 to INT13, INT20 to INT27
P20 to P27, P31, P32, P40 to P47, P50 to P57 P00 to P07, P10 to P17
0.2 VCC
V
Open-drain output
pin application voltage "H" level output voltage
VD VOH1 VOH2 VOL1
VSS - 0.3 IOH = -2.0 mA IOH = -6.0 mA IOL = 1.8 mA IOL = 8.0 mA IOL = 4.0 mA 0.0 V < VI < VCC
0.0 V < VI < 6.0 V
-- -- -- -- 50 -- -- 500
VSS + 6.0*1
V V V V V V A A k k k
2.4 4.0 -- -- -- -- -- 25 -- -- 300
-- 0.4 0.4 0.4 5 1 100 2.5 15 750
P30
P00 to P07, P10 to P17,
P20, P22 to P25,
P30 to P32, P40 to P47,
"L" level output voltage VOL2 VOL3
Input leakage current ILI1
P50 to P57 P21, P26, P27 RST
MOD0, MOD1, P30, P00 to P07, P10 to P17 P20 to P27, P31, P32, P40 to P47, P50 to P57
(Hi-z output leakage current)
Without pull-up resistor Without pull-up resistor With pull-up resistor
ILI2
Pull-up resistance RPULL Common output impedance Segment output impedance LCD divided resistance LCD leakage current
P00 to P07, P10 to P17, P20 to P27, P40 to P47, VI = 0.0 V
P50 to P57, RST RVCOM COM0 to COM3 RVSEG RLCD SEG0 to SEG35 -- V0 to V3, COM0 to COM3, SEG0 to SEG35
V1 to V3 = 5.0 V V1 to V3 = 5.0 V
Between VCC and V0 --
Products k without a booster only A
ILCDL
--
--
1
(Continued)
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MB89150/150A Series
(VCC = +5.0 V, VSS = 0.0 V, TA = -40C to +85C)
Parameter
Symbol
Pin V3 V2 V1
Condition V1 = 1.5 V IIN = 0 A
Value Min. 4.3 2.9 1.3 Typ. 4.5 3.0 1.5 Max. 4.7 3.1 1.7
Unit
Remarks
VOV3 Booster for LCD driving output voltage VOV2 Reference output voltage for LCD VOV1 driving
V V V MB89151/A, 152/A, 153/A, mA 154/A, 155/A, MB89PV150101 to 105 mA to 105/201 to 205 MB89151/A, 152/A,153/A, mA 154/A, 155/A, MB89PV150101 to 105 mA to 105/201 to 205 MB89151/A, 152/A, 153/A, mA 154/A, 155/A, MB89PV150101 to 105 mA to 105/201 to 205
MB89P155-101 MB89P155-101 MB89P155-101
Products with a booster only
FCH = 4.2 MHz,
ICC1
VCC = 5.0 V tinst*3 = 0.95 s Main clock operation
--
3.0
4.5
--
3.8
6.0
FCH = 4.2 MHz,
ICC2
VCC = 3.0 V tinst*3 = 15.2 s Main clock operation
--
0.25
0.4
--
0.85
1.4
FCL = 32.768 kHz,
Power supply current*2
ICCL
VCC
VCC = 3.0 V tinst*3 = 61 s Subclock operation
FCH = 4.2 MHz,
--
0.05
0.1
--
0.65
1.1
ICCS1
VCC = 5.0 V tinst*3 = 0.95 s Main clock sleep mode
FCH = 4.2 MHz,
--
0.8
1.2
mA
ICCS2
VCC = 3.0 V tinst*3 = 15.2 s Main clock sleep mode
FCL = 32.768 kHz,
--
0.2
0.3
mA
ICCSL
VCC = 3.0 V tinst*3 = 61 s Subclock sleep mode
--
25
50
A
(Continued)
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MB89150/150A Series
(Continued)
(VCC = +5.0 V, VSS = 0.0 V, TA = -40C to +85C)
Parameter
Symbol
Pin
Condition
FCL = 32.768 kHz,
Value Min. Typ. Max.
Unit
Remarks
ICCT
VCC = 3.0 V Watch mode
FCL = 32.768 kHz,
--
10
15
MB89151/2/3/4/5, MB89P155-101 A to 105, MB89PV150-101 to 105
Power supply current*2
ICCT2
VCC
VCC = 3.0 V * Watch mode * During reference voltage generator and booster operation TA = +25C, VCC = 5.0 V Stop mode
--
250
400
A MB89P155-201
to 205
MB89151A/2A/ 3A/4A/5A,
-- ICCH -- --
0.1 0.1 10
1 10
A MB89151/2/3/4/5
MB89PV150-101 to 105, A MB89P155-101 to 105
Input capacitance CIN
Other than VCC, VSS f = 1 MHz
pF
*1: P31 and P32 are applicable only for products of the MB89150 series (without the "A" suffix). P40 to P47 and P50 to P57 are applicable when selected as ports. *2: The power supply current is measured at the external clock, open output pins, and the external LCD dividing resistor (or external input for the reference voltage). In the case of the MB89PV150, the current consumed by the connected EPROM and ICE is not included. *3: For information on tinst, see "(4) Instruction Cycle" in "4. AC Characteristics." Note: For pins which serves as the segment (SEG20 to SEG35) and ports (P40 to P47, P50 to P57), see the port parameter when these pins are used as ports and the segment parameter when they are used as segments. P31 and P32 are applicable only for products without a booster (applicable as external capacitor connection pins for products with a booster).
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MB89150/150A Series
4. AC Characteristics
(1) Reset Timing
(VSS = 0.0 V, TA = -40C to +85C)
Parameter RST "L" pulse width
Symbol tZLZH
Condition --
Value Min. 48 tHCYL Max. --
Unit ns
Remarks
tZLZH RST 0.2 VCC
(2) Power-on Reset
(VSS = 0.0 V, TA = -40C to +85C)
Parameter Power supply rising time Power supply cut-off time
Symbol tR tOFF
Condition --
Value Min. -- 1 Max. 50 --
Unit ms ms
Remarks Power-on reset function only Due to repeated operations
Note: Make sure that power supply rises within the selected oscillation stabilization time. If power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended.
tR 2.0 V 0.2 V
tOFF
VCC
0.2 V
0.2 V
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MB89150/150A Series
(3) Clock Timing
(VSS = 0.0 V, TA = -40C to +85C)
Parameter Clock frequency Clock cycle time
Symbol FCH FCL tHCYL tLCYL PWH PWL PWHL PWLL tCR tCF
Pin X0, X1 X0A, X1A X0, X1 X0A, X1A X0 X0A X0, X0A
Value Min. 1 -- 238 -- 20 -- -- Typ. -- 32.768 -- 30.5 -- 15.2 -- Max. 4.2 -- 1000 -- -- -- 10
Unit MHz kHz ns s ns s ns
Remarks Main clock Subclock Main clock Subclock
Input clock pulse width
External clock
Input clock pulse rising/falling time
X0 and X1 Timing and Conditions
tHCYL
0.8 VCC 0.2 VCC X0 PWH tCF PWL tCR
Main Clock Conditions
When a crystal or ceramic resonator is used X0 FCH Open FCH C1 C2 C R FCH X1 When an external clock is used X0 X1 When the CR oscillation option is used X0 X1
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MB89150/150A Series
X0A and X1A Timing and Conditions
tLCYL
0.8 VCC 0.2 VCC X0A PWHL tCF PWLL tCR
Subclock Conditions
When a crystal or ceramic resonator is used X0A FCL C1 X1A R FCL C2 When an external clock is used X0A X1A When the single clock option is used X0A X1A
Open
Open
(4) Instruction Cycle Parameter Symbol Value 4/FCH, 8/FCH, 16/FCH, 64/FCH 2/FCL Unit s s Remarks (4/FCH) tinst = 0.95 s when operating at FCH = 4.2 MHz tinst = 61.036 s when operating at FCL = 32.768 kHz
Instruction cycle tinst (minimum execution time)
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MB89150/150A Series
(5) Serial I/O Timing
(VCC = +5.0 V10%, VSS= 0.0 V, TA = -40C to +85C)
Parameter Serial clock cycle time SCK SO time Valid SI SCK SCK valid SI hold time Serial clock "H" pulse width Serial clock "L" pulse width SCK SO time Valid SI SCK SCK valid SI hold time
Symbol tSCYC tSLOV tIVSH tSHIX tSHSL tSLSH tSLOV tIVSH tSHIX
Pin SCK SCK, SO SI, SCK SCK, SI SCK SCK SCK, SO SI, SCK SCK, SI
Condition
Value Min. 2 tinst* -200 0.5 tinst* 0.5 tinst* 1 tinst* 1 tinst* Max. -- 200 -- -- -- -- 200 -- --
Unit s ns s s s s ns s s
Remarks
Internal shift clock mode
External shift clock mode
0 0.5 tinst* 0.5 tinst*
* : For information on tinst, see "(4) Instruction Cycle."
Internal Shift Clock Mode
tSCYC 2.4 V 0.8 V tSLOV 2.4 V 0.8 V tIVSH tSHIX 0.8 VCC 0.2 VCC 0.8 VCC 0.2 VCC 0.8 V
SCK
SO
SI
External Shift Clock Mode
tSLSH 0.8 VCC 0.2 VCC 0.2 VCC tSLOV 2.4 V 0.8 V tIVSH tSHIX 0.8 VCC 0.2 VCC 0.8 VCC 0.2 VCC tSHSL 0.8 VCC
SCK
SO
SI
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MB89150/150A Series
(6) Peripheral Input Timing
(VCC = +5.0 V10%, VSS = 0.0 V, TA = -40C to +85C)
Parameter Peripheral input "H" pulse width 1 Peripheral input "L" pulse width 1 Peripheral input "H" pulse width 2 Peripheral input "L" pulse width 2
Symbol tILIH1 tIHIL1 tILIH2 tIHIL2
Pin INT10 to INT13, EC INT20 to INT27
Value Min. 1 tinst* 1 tinst* 2 tinst* 2 tinst* Max. -- -- -- --
Unit s s s s
Remarks
* : For information on tinst, see "(4) Instruction Cycle."
tIHIL1 INT10 to 13, EC 0.2 VCC 0.8 VCC 0.2 VCC
tILIH1 0.8 VCC
tIHIL2 INT20 to 27 0.2 VCC 0.8 VCC 0.2 VCC
tILIH2 0.8 VCC
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MB89150/150A Series
s EXAMPLE CHARACTERISTICS
(1) "L" Level Output Voltage
VOL1 vs. IOL
VOL1 (V) 0.6 TA = +25C 0.5 0.4 0.3 0.2 0.1 0 VCC = 5.0 V VCC = 6.0 V VCC = 2.5 V VCC = 2.0 V VCC = 3.0 V VCC = 4.0 V
VOL2 vs. IOL
VOL2 (V) VCC = 2.0 V 1.0 TA = +25C 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V VCC = 2.5 V VCC = 3.0 V
0
1
2
3
4
5
6
7
8
9
10 IOL (mA)
0
0
2
4
6
8
10
12 14 16 18 20 IOL (mA)
(2) "H" Level Output Voltage
VCC - VOH1 vs. IOH
VCC - VOH1 (V) VCC = 2.0 V VCC = 2.5 V VCC = 3.0 V 1.0 TA = +25C 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 -1 -2 -3 -4 -5 IOH (mA) VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V
VCC - VOH2 vs. IOH
VCC - VOH2 (V) VCC = 2.0 V VCC = 2.5 V VCC = 3.0 V 1.0 TA = +25C 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 IOH (mA) VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V
(Continued)
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MB89150/150A Series
(3) "H" Level Input Voltage/"L" level Input Voltage (CMOS input)
V IN (V) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 1 2 3 4 5 6 7 VCC (V)
(Hysteresis input)
VIN vs. VCC
TA = +25C V IN (V) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 1 2 3 4 5 6 7 VCC (V) VILS
VIN vs. VCC
TA = +25C VIHS
VIHS: Threshold when input voltage in hysteresis characteristics is set to "H" level VILS: Threshold when input voltage in hysteresis characteristics is set to "L" level
(4) Power Supply Current (External Clock)
ICC1 vs. VCC (Mask ROM product)
ICC1 (mA) 5.0 TA = +25C 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 1 2 3 4 5 6 7 VCC (V) FCH = 1 MHz FCH = 4.2 MHz FCH = 3 MHz
ICC2 vs. VCC (Mask ROM product)
ICC2 (mA) 1.0 TA = +25C 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 1 2 3 4 5 6 7 VCC (V) FCH = 1 MHz FCH = 3 MHz FCH = 4.2 MHz
(Continued)
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MB89150/150A Series
ICCS1 (mA) 1.2 TA = +25C 1.1 1.0 0.9
ICCS1 vs. VCC
FCH = 4.2 MHz
ICCS2 (mA) 1.0 TA = +25C 0.9 0.8
ICCS2 vs. VCC
FCH = 3 MHz 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 1 2 3 4 5 6 7 VCC (V) FCH = 1 MHz
0.7 0.6 FCH = 4.2 MHz 0.5 FCH = 3 MHz 0.4 FCH = 1 MHz 0.3 0.2 0.1 0 1 2 3 4 5 6 7 VCC (V)
ICCL vs. VCC (Mask ROM product)
ICCL (A) 200 TA = +25C 180 160 140 120 100 80 60 40 20 0 1 2 3 4 5 6 7 VCC (V) FCL = 32.768 kHz
ICCT (A) 30 TA = +25C 25
ICCT vs. VCC
20
FCL = 32.768 kHz
15
10
5
0
1
2
3
4
5
6
7 VCC (V)
(Continued)
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MB89150/150A Series
(Continued)
ICCSL vs. VCC ICCT2 vs. VCC
ICCSL (A) 200
ICCT2 (A) 1,000
TA = +25C 180 160 140 120 100 80 60 40 20 0 1 2 3 4 5 6 7 VCC (V) FCL = 32.768 kHz 900 800 700
TA = +25C
FCL = 32.768 kHz 600 500 400 300 200 100 0 1 2 3 4 5 6 7 VCC (V)
(5) Pull-up Resistance
RPULL (k) 1,000 500
100 50
TA = +85C TA = +25C TA = -40C
10 1 2 3 4 5 6 7 VCC (V)
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MB89150/150A Series
s INSTRUCTIONS
Execution instructions can be divided into the following four groups: * * * * Transfer Arithmetic operation Branch Others
Table 1 lists symbols used for notation of instructions. Table 1 Symbol dir off ext #vct #d8 #d16 dir: b rel @ A AH AL T TH TL IX Direct address (8 bits) Offset (8 bits) Extended address (16 bits) Vector table number (3 bits) Immediate data (8 bits) Immediate data (16 bits) Bit direct address (8:3 bits) Branch relative address (8 bits) Register indirect (Example: @A, @IX, @EP) Accumulator A (Whether its length is 8 or 16 bits is determined by the instruction in use.) Upper 8 bits of accumulator A (8 bits) Lower 8 bits of accumulator A (8 bits) Temporary accumulator T (Whether its length is 8 or 16 bits is determined by the instruction in use.) Upper 8 bits of temporary accumulator T (8 bits) Lower 8 bits of temporary accumulator T (8 bits) Index register IX (16 bits) Instruction Symbols Meaning
(Continued)
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MB89150/150A Series
(Continued)
Symbol EP PC SP PS dr CCR RP Ri x (x) (( x )) Extra pointer EP (16 bits) Program counter PC (16 bits) Stack pointer SP (16 bits) Program status PS (16 bits) Accumulator A or index register IX (16 bits) Condition code register CCR (8 bits) Register bank pointer RP (5 bits) General-purpose register Ri (8 bits, i = 0 to 7) Indicates that the very x is the immediate data. (Whether its length is 8 or 16 bits is determined by the instruction in use.) Indicates that the contents of x is the target of accessing. (Whether its length is 8 or 16 bits is determined by the instruction in use.) The address indicated by the contents of x is the target of accessing. (Whether its length is 8 or 16 bits is determined by the instruction in use.) Meaning
Columns indicate the following: Mnemonic: ~: #: Operation: TL, TH, AH: Assembler notation of an instruction Number of instructions Number of bytes Operation of an instruction A content change when each of the TL, TH, and AH instructions is executed. Symbols in the column indicate the following: * "-" indicates no change. * dH is the 8 upper bits of operation description data. * AL and AH must become the contents of AL and AH immediately before the instruction is executed. * 00 becomes 00. N, Z, V, C: OP code: An instruction of which the corresponding flag will change. If + is written in this column, the relevant instruction will change its corresponding flag. Code of an instruction. If an instruction is more than one code, it is written according to the following rule: Example: 48 to 4F This indicates 48, 49, ... 4F.
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MB89150/150A Series
Table 2 Mnemonic MOV dir,A MOV @IX +off,A MOV ext,A MOV @EP,A MOV Ri,A MOV A,#d8 MOV A,dir MOV A,@IX +off MOV A,ext MOV A,@A MOV A,@EP MOV A,Ri MOV dir,#d8 MOV @IX +off,#d8 MOV @EP,#d8 MOV Ri,#d8 MOVW dir,A MOVW @IX +off,A MOVW ext,A MOVW @EP,A MOVW EP,A MOVW A,#d16 MOVW A,dir MOVW A,@IX +off MOVW A,ext MOVW A,@A MOVW A,@EP MOVW A,EP MOVW EP,#d16 MOVW IX,A MOVW A,IX MOVW SP,A MOVW A,SP MOV @A,T MOVW @A,T MOVW IX,#d16 MOVW A,PS MOVW PS,A MOVW SP,#d16 SWAP SETB dir: b CLRB dir: b XCH A,T XCHW A,T XCHW A,EP XCHW A,IX XCHW A,SP MOVW A,PC ~ 3 4 4 3 3 2 3 4 4 3 3 3 4 5 4 4 4 5 5 4 2 3 4 5 5 4 4 2 3 2 2 2 2 3 4 3 2 2 3 2 4 4 2 3 3 3 3 2 # 2 2 3 1 1 2 2 2 3 1 1 1 3 3 2 2 2 2 3 1 1 3 2 2 3 1 1 1 3 1 1 1 1 1 1 3 1 1 3 1 2 2 1 1 1 1 1 1 Transfer Instructions (48 instructions) Operation (dir) (A) ( (IX) +off ) (A) (ext) (A) ( (EP) ) (A) (Ri) (A) (A) d8 (A) (dir) (A) ( (IX) +off) (A) (ext) (A) ( (A) ) (A) ( (EP) ) (A) (Ri) (dir) d8 ( (IX) +off ) d8 ( (EP) ) d8 (Ri) d8 (dir) (AH),(dir + 1) (AL) ( (IX) +off) (AH), ( (IX) +off + 1) (AL) (ext) (AH), (ext + 1) (AL) ( (EP) ) (AH),( (EP) + 1) (AL) (EP) (A) (A) d16 (AH) (dir), (AL) (dir + 1) (AH) ( (IX) +off), (AL) ( (IX) +off + 1) (AH) (ext), (AL) (ext + 1) (AH) ( (A) ), (AL) ( (A) ) + 1) (AH) ( (EP) ), (AL) ( (EP) + 1) (A) (EP) (EP) d16 (IX) (A) (A) (IX) (SP) (A) (A) (SP) ( (A) ) (T) ( (A) ) (TH),( (A) + 1) (TL) (IX) d16 (A) (PS) (PS) (A) (SP) d16 (AH) (AL) (dir): b 1 (dir): b 0 (AL) (TL) (A) (T) (A) (EP) (A) (IX) (A) (SP) (A) (PC) TL - - - - - AL AL AL AL AL AL AL - - - - - - - - - AL AL AL AL AL AL - - - - - - - - - - - - - - - AL AL - - - - TH - - - - - - - - - - - - - - - - - - - - - AH AH AH AH AH AH - - - - - - - - - - - - - - - - AH - - - - AH - - - - - - - - - - - - - - - - - - - - - dH dH dH dH dH dH dH - - dH - dH - - - dH - - AL - - - dH dH dH dH dH NZVC ---- ---- ---- ---- ---- ++-- ++-- ++-- ++-- ++-- ++-- ++-- ---- ---- ---- ---- ---- ---- ---- ---- ---- ++-- ++-- ++-- ++-- ++-- ++-- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ++++ ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- OP code 45 46 61 47 48 to 4F 04 05 06 60 92 07 08 to 0F 85 86 87 88 to 8F D5 D6 D4 D7 E3 E4 C5 C6 C4 93 C7 F3 E7 E2 F2 E1 F1 82 83 E6 70 71 E5 10 A8 to AF A0 to A7 42 43 F7 F6 F5 F0
Notes: * During byte transfer to A, T A is restricted to low bytes. * Operands in more than one operand instruction must be stored in the order in which their mnemonics are written. (Reverse arrangement of F2MC-8 family)
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MB89150/150A Series
Table 3 Mnemonic ADDC A,Ri ADDC A,#d8 ADDC A,dir ADDC A,@IX +off ADDC A,@EP ADDCW A ADDC A SUBC A,Ri SUBC A,#d8 SUBC A,dir SUBC A,@IX +off SUBC A,@EP SUBCW A SUBC A INC Ri INCW EP INCW IX INCW A DEC Ri DECW EP DECW IX DECW A MULU A DIVU A ANDW A ORW A XORW A CMP A CMPW A RORC A ROLC A CMP A,#d8 CMP A,dir CMP A,@EP CMP A,@IX +off CMP A,Ri DAA DAS XOR A XOR A,#d8 XOR A,dir XOR A,@EP XOR A,@IX +off XOR A,Ri AND A AND A,#d8 AND A,dir ~ 3 2 3 4 3 3 2 3 2 3 4 3 3 2 4 3 3 3 4 3 3 3 19 21 3 3 3 2 3 2 2 2 3 3 4 3 2 2 2 2 3 3 4 3 2 2 3 # 1 2 2 2 1 1 1 1 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 2 1 1 1 1 2 2 1 2 1 1 2 2 Arithmetic Operation Instructions (62 instructions) Operation (A) (A) + (Ri) + C (A) (A) + d8 + C (A) (A) + (dir) + C (A) (A) + ( (IX) +off) + C (A) (A) + ( (EP) ) + C (A) (A) + (T) + C (AL) (AL) + (TL) + C (A) (A) - (Ri) - C (A) (A) - d8 - C (A) (A) - (dir) - C (A) (A) - ( (IX) +off) - C (A) (A) - ( (EP) ) - C (A) (T) - (A) - C (AL) (TL) - (AL) - C (Ri) (Ri) + 1 (EP) (EP) + 1 (IX) (IX) + 1 (A) (A) + 1 (Ri) (Ri) - 1 (EP) (EP) - 1 (IX) (IX) - 1 (A) (A) - 1 (A) (AL) x (TL) (A) (T) / (AL),MOD (T) (A) (A) (T) (A) (A) (T) (A) (A) (T) (TL) - (AL) (T) - (A) CA C A (A) - d8 (A) - (dir) (A) - ( (EP) ) (A) - ( (IX) +off) (A) - (Ri) Decimal adjust for addition Decimal adjust for subtraction (A) (AL) (TL) (A) (AL) d8 (A) (AL) (dir) (A) (AL) ( (EP) ) (A) (AL) ( (IX) +off) (A) (AL) (Ri) (A) (AL) (TL) (A) (AL) d8 (A) (AL) (dir) TL - - - - - - - - - - - - - - - - - - - - - - - dL - - - - - - - - - - - - - - - - - - - - - - - TH - - - - - - - - - - - - - - - - - - - - - - - 00 - - - - - - - - - - - - - - - - - - - - - - - AH - - - - - dH - - - - - - dH - - - - dH - - - dH dH 00 dH dH dH - - - - - - - - - - - - - - - - - - - - NZVC ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++++ +++- ---- ---- ++-- +++- ---- ---- ++-- ---- ---- ++R- ++R- ++R- ++++ ++++ ++-+ ++-+ ++++ ++++ ++++ ++++ ++++ ++++ ++++ ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++R- OP code 28 to 2F 24 25 26 27 23 22 38 to 3F 34 35 36 37 33 32 C8 to CF C3 C2 C0 D8 to DF D3 D2 D0 01 11 63 73 53 12 13 03 02 14 15 17 16 18 to 1F 84 94 52 54 55 57 56 58 to 5F 62 64 65
(Continued)
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MB89150/150A Series
(Continued)
Mnemonic AND A,@EP AND A,@IX +off AND A,Ri OR A OR A,#d8 OR A,dir OR A,@EP OR A,@IX +off OR A,Ri CMP dir,#d8 CMP @EP,#d8 CMP @IX +off,#d8 CMP Ri,#d8 INCW SP DECW SP ~ 3 4 3 2 2 3 3 4 3 5 4 5 4 3 3 # 1 2 1 1 2 2 1 2 1 3 2 3 2 1 1 Operation (A) (AL) ( (EP) ) (A) (AL) ( (IX) +off) (A) (AL) (Ri) (A) (AL) (TL) (A) (AL) d8 (A) (AL) (dir) (A) (AL) ( (EP) ) (A) (AL) ( (IX) +off) (A) (AL) (Ri) (dir) - d8 ( (EP) ) - d8 ( (IX) + off) - d8 (Ri) - d8 (SP) (SP) + 1 (SP) (SP) - 1 Table 4 Mnemonic BZ/BEQ rel BNZ/BNE rel BC/BLO rel BNC/BHS rel BN rel BP rel BLT rel BGE rel BBC dir: b,rel BBS dir: b,rel JMP @A JMP ext CALLV #vct CALL ext XCHW A,PC RET RETI ~ 3 3 3 3 3 3 3 3 5 5 2 3 6 6 3 4 6 # 2 2 2 2 2 2 2 2 3 3 1 3 1 3 1 1 1 TL - - - - - - - - - - - - - - - TH - - - - - - - - - - - - - - - AH - - - - - - - - - - - - - - - NZVC ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++R- ++++ ++++ ++++ ++++ ---- ---- OP code 67 66 68 to 6F 72 74 75 77 76 78 to 7F 95 97 96 98 to 9F C1 D1
Branch Instructions (17 instructions) Operation TL - - - - - - - - - - - - - - - - - TH - - - - - - - - - - - - - - - - - AH - - - - - - - - - - - - - - dH - - NZVC ---- ---- ---- ---- ---- ---- ---- ---- -+-- -+-- ---- ---- ---- ---- ---- ---- Restore OP code FD FC F9 F8 FB FA FF FE B0 to B7 B8 to BF E0 21 E8 to EF 31 F4 20 30
If Z = 1 then PC PC + rel If Z = 0 then PC PC + rel If C = 1 then PC PC + rel If C = 0 then PC PC + rel If N = 1 then PC PC + rel If N = 0 then PC PC + rel If V N = 1 then PC PC + rel If V N = 0 then PC PC + reI If (dir: b) = 0 then PC PC + rel If (dir: b) = 1 then PC PC + rel (PC) (A) (PC) ext Vector call Subroutine call (PC) (A),(A) (PC) + 1 Return from subrountine Return form interrupt Table 5
Other Instructions (9 instructions) Operation TL - - - - - - - - - TH - - - - - - - - - AH - dH - - - - - - - NZVC ---- ---- ---- ---- ---- ---R ---S ---- ---- OP code 40 50 41 51 00 81 91 80 90
Mnemonic PUSHW A POPW A PUSHW IX POPW IX NOP CLRC SETC CLRI SETI
~ 4 4 4 4 1 1 1 1 1
# 1 1 1 1 1 1 1 1 1
45
46
3 RETI SETC PUSHW POPW MOV MOVW CLRI A A A,ext A,PS CLRB BBC INCW DECW MOVW MOVW dir: 1 dir: 1,rel SP SP SP,A A,SP SETI CLRB BBC INCW DECW JMP MOVW dir: 0 dir: 0,rel A A @A A,PC 4 5 6 7 8 9 A B C D E F SUBC A A XCH XOR AND OR A, T A A MOV MOV CLRB BBC INCW DECW MOVW MOVW @A,T A,@A dir: 2 dir: 2,rel IX IX IX,A A,IX
L
H
0
1
2
0
NOP
SWAP
RET
1
MULU
DIVU
A
A
JMP CALL PUSHW POPW MOV MOVW CLRC addr16 addr16 IX IX ext,A PS,A
2
ROLC
CMP
ADDC
A
A
A
s INSTRUCTION MAP
3 XOR AND OR DAA A,#d8 A,#d8 A,#d8 DAS
RORC CMPW ADDCW SUBCW XCHW XORW ANDW ORW MOVW MOVW CLRB BBC INCW DECW MOVW MOVW A A A A A, T A A A @A,T A,@A dir: 3 dir: 3,rel EP EP EP,A A,EP CLRB BBC MOVW MOVW MOVW XCHW dir: 4 dir: 4,rel A,ext ext,A A,#d16 A,PC
4
MOV CMP ADDC SUBC A,#d8 A,#d8 A,#d8 A,#d8
MB89150/150A Series
5 SUBC MOV XOR AND OR MOV CMP
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP CLRB BBC MOVW MOVW MOVW XCHW A,dir A,dir A,dir A,dir dir,A A,dir A,dir A,dir dir,#d8 dir,#d8 dir: 5 dir: 5,rel A,dir dir,A SP ,#d16 A,SP CLRB BBC MOVW MOVW MOVW XCHW dir: 6 dir: 6,rel A,@IX +d @IX +d,A IX,#d16 A,IX
6
MOV
CMP
ADDC
A,@IX +d A,@IX +d A,@IX +d A,@IX +d @IX +d,A A@,IX +d A,@IX +d A,@IX +d @IX +d,#d8 @IX +d,#d8
7
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP CLRB BBC MOVW MOVW MOVW XCHW ,#d8 @EP ,#d8 A,@EP A,@EP A,@EP A,@EP @EP,A A,@EP A,@EP A,@EP @EP dir: 7 dir: 7,rel A,@EP @EP,A EP ,#d16 A,EP
8
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC DEC CALLV BNC A,R0 A,R0 A,R0 A,R0 R0,A A,R0 A,R0 A,R0 R0,#d8 R0,#d8 dir: 0 dir: 0,rel R0 R0 #0 rel rel rel rel
9
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC DEC CALLV BC A,R1 A,R1 A,R1 A,R1 R1,A A,R1 A,R1 A,R1 R1,#d8 R1,#d8 dir: 1 dir: 1,rel R1 R1 #1
A
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC DEC CALLV BP A,R2 A,R2 A,R2 A,R2 R2,A A,R2 A,R2 A,R2 R2,#d8 R2,#d8 dir: 2 dir: 2,rel R2 R2 #2
B
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC DEC CALLV BN A,R3 A,R3 A,R3 A,R3 R3,A A,R3 A,R3 A,R3 R3,#d8 R3,#d8 dir: 3 dir: 3,rel R3 R3 #3
C
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC DEC CALLV BNZ A,R4 A,R4 A,R4 A,R4 R4,A A,R4 A,R4 A,R4 R4,#d8 R4,#d8 dir: 4 dir: 4,rel R4 R4 #4 rel rel
D
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC DEC CALLV BZ A,R5 A,R5 A,R5 A,R5 R5,A A,R5 A,R5 A,R5 R5,#d8 R5,#d8 dir: 5 dir: 5,rel R5 R5 #5
E
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC DEC CALLV BGE A,R6 A,R6 A,R6 A,R6 R6,A A,R6 A,R6 A,R6 R6,#d8 R6,#d8 dir: 6 dir: 6,rel R6 R6 #6 rel
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F
MOV CMP ADDC SUBC MOV XOR AND OR MOV CMP SETB BBS INC DEC CALLV BLT A,R7 A,R7 A,R7 A,R7 R7,A A,R7 A,R7 A,R7 R7,#d8 R7,#d8 dir: 7 dir: 7,rel R7 R7 #7 rel
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MB89150/150A Series
s MASK OPTIONS
Part number No. Specifying procedure 1 2 3 4 Pull-up resistors P00 to P07, P10 to P17 Pull-up resistors P40 to P47, P50 to P57 Pull-up resistors P20 to P27 Power-on reset With power-on reset Without power-on reset
Selection of oscillation stabilization time
MB89151/1A, 2/2A, 3/3A, 4/4A, 5/5A Specify when ordering masking Selectable per pin
MB89P155 Set with EPROM programmer Can be set per pin
MB89PV150 Setting not possible
Selectable per pin Fixed to without a (Only when segment pull-up resistor output is not selected.) Selectable by pin Selectable Selectable
WTM1 WTM0
Fixed to without a pull-up resistor
Fixed to without a pull-up resistor Selectable Selectable
WTM1WTM0
Fixed to with power-on reset
5
* The initial value of the oscillation stabilization time for the main clock can be set by selecting the values of the WTM1 and WTM0 bits on the right. Main clock oscillation type Crystal or ceramic resonator CR Reset pin output With reset output Without reset output Clock mode selection Dual-clock mode Single-clock mode Segment output selection 36: No ports selection 32: Selection of P57 to P54 28: Selection of P57 to P50
24: Selection of P57 to P50, and P47 to P44. 20: Selection of P57 to P50, and P47 to P40.
0 0 1 1
0: 1: 0: 1:
22/FCH 212/FCH 216/FCH 218/FCH
0 0 1 1
0: 1: 0: 1:
22/FCH Fixed to oscillation stabilization time of 212/FCH 16 16/FCH 2 /FCH 2 218/FCH Fixed to crystal or ceramic Fixed to with reset output Fixed to dual-clock mode -101: 36 segments -102: 32 segments -103: 28 segments -104: 24 segments -105: 20 segments Fixed to without booster (-100 to 105 only)
6
Selectable
Fixed to crystal or ceramic only Selectable
7
Selectable
8
Selectable
Selectable
9
Selectable Selection of the number of segments. Without booster: MB89151/2/3/4/5 With booster:
-101/201: 36 segments -102/202: 32 segments -103/203: 28 segments -104/204: 24 segments -105/205: 20 segments
10
Selection of a built-in booster
Without booster: -101 to 105 With booster: MB89151A/2A/3A/4A/5A -201 to 205
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MB89150/150A Series
* Versions Version Mass production product MB8915151A 152A 153A 154A 155A MB8915151 152 153 154 155 One-time PROM product MB89P155-201 -202 -203 -204 -205 MB89P155-101 -102 -103 -104 -105
Piggyback/evaluation product
Features Number of segment pins 36 32 28 24 20 36 32 28 24 20 Booster
--
Yes
MB89PV150-101 -102 -103 -104 -105
No
s ORDERING INFORMATION
Part number MB89151PF MB89152PF MB89153PF MB89154PF MB89155PF MB89P155PF-101 MB89P155PF-102 MB89P155PF-103 MB89P155PF-104 MB89P155PF-105 MB89151APF MB89152APF MB89153APF MB89154APF MB89155APF MB89P155PF-201 MB89P155PF-202 MB89P155PF-203 MB89P155PF-204 MB89P155PF-205 Package Remarks
Without booster
80-pin Plastic QFP (FPT-80P-M06)
With booster
(Continued)
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MB89150/150A Series
(Continued)
Part number MB89151PFM MB89152PFM MB89153PFM MB89154PFM MB89155PFM MB89P155PFM-101 MB89P155PFM-102 MB89P155PFM-103 MB89P155PFM-104 MB89P155PFM-105 MB89151APFM MB89152APFM MB89153APFM MB89154APFM MB89155APFM MB89P155PFM-201 MB89P155PFM-202 MB89P155PFM-203 MB89P155PFM-204 MB89P155PFM-205 MB89151PFV MB89152PFV MB89153PFV MB89154PFV MB89155PFV MB89P155PFV-101 MB89P155PFV-102 MB89P155PFV-103 MB89P155PFV-104 MB89P155PFV-105 MB89151APFV MB89152APFV MB89153APFV MB89154APFV MB89155APFV MB89P155PFV-201 MB89P155PFV-202 MB89P155PFV-203 MB89P155PFV-204 MB89P155PFV-205 MB89PV150CF-101 MB89PV150CF-102 MB89PV150CF-103 MB89PV150CF-104 MB89PV150CF-105 Package Remarks
Without booster
80-pin Plastic LQFP (FPT-80P-M11)
With booster
Without booster
80-pin Plastic LQFP (FPT-80P-M05)
With booster
80-pin Ceramic MQFP (MQP-80C-P01)
Without booster
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MB89150/150A Series
s PACKAGE DIMENSIONS
80-pin Plastic QFP (FPT-80P-M06)
23.900.40(.941.016)
64 65
20.000.20(.787.008)
41 40
3.35(.132)MAX 0.05(.002)MIN (STAND OFF)
14.000.20 (.551.008)
INDEX
80 25
17.900.40 (.705.016)
12.00(.472) REF
16.300.40 (.642.016)
"A" LEAD No.
1 24
0.80(.0315)TYP
0.350.10 (.014.004)
0.16(.006)
M
0.150.05(.006.002)
Details of "A" part 0.25(.010) "B" 0.10(.004) 18.40(.724)REF 22.300.40(.878.016) 0.30(.012) 0.18(.007)MAX 0.58(.023)MAX
Details of "B" part
0 10 0.800.20 (.031.008)
C
1994 FUJITSU LIMITED F80010S-3C-2
Dimensions in mm (inches)
80-pin Plastic LQFP (FPT-80P-M11)
16.000.20(.630.008)SQ
60
14.000.10(.551.004)SQ
41
1.50 -0.10 +.008 .059 -.004
+0.20
(Mounting height)
61
40
12.35 (.486) REF
15.00 (.591) NOM
1 PIN INDEX
80 21
LEAD No.
1 20
"A" 0.300.10 (.012.004) 0.13(.005)
M
Details of "A" part 0.127 .005
+0.05 -0.02 +.002 -.001
0.65(.0256)TYP
0.100.10 (STAND OFF) (.004.004)
0.10(.004)
0
10
0.500.20 (.020.008)
C
1995 FUJITSU LIMITED F80016S-1C-3
Dimensions in mm (inches)
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MB89150/150A Series
80-pin Plastic LQFP (FPT-80P-M05)
14.000.20(.551.008)SQ
60
12.000.10(.472.004)SQ
1.50 -0.10 +.008 .059 -.004
41
+0.20
(Mounting height)
61
40
9.50 (.374) REF INDEX
80 21
13.00 (.512) NOM
LEAD No.
1
20
"A" 0.127 -0.02 +.002 .005 -.001
+0.05
Details of "A" part
0.500.08 (.0197.0031)
0.18 -0.03 +.003 .007 -.001
+0.08
0.100.10 (STAND OFF) (.004.004)
0.500.20(.020.008) 0.10(.004) 0 10
C
1995 FUJITSU LIMITED F80008S-2C-5
Dimensions in mm (inches)
80-pin Ceramic MQFP (MQP-80C-P01)
18.70(.736)TYP 12.00(.472)TYP 16.300.33 (.642.013) 15.580.20 (.613.008) 1.50(.059)TYP 1.00(.040)TYP 4.50(.177) TYP 1.20 -0.20 +.016 .047 -.008
+0.40
INDEX AREA
0.800.25 (.0315.010) 0.800.25 (.0315.010)
1.270.13 (.050.005) 22.300.33 (.878.013) 24.70(.972) TYP 0.30(.012) TYP 18.120.20 12.02(.473) (.713.008) TYP 10.16(.400) 14.22(.560) TYP TYP
INDEX AREA 18.40(.724) REF
INDEX 6.00(.236) TYP 0.30(.012)TYP 7.62(.300)TYP 9.48(.373)TYP 11.68(.460)TYP 0.400.10 (.016.004) 1.50(.059) TYP 1.00(.040) TYP
1.270.13 (.050.005)
0.400.10 (.016.004)
1.20 -0.20 +.016 .047 -.008
+0.40
0.150.05 8.70(.343) (.006.002) MAX
C
1994 FUJITSU LIMITED M80001SC-4-2
Dimensions in mm (inches) 51
To Top / Lineup / Index
MB89150/150A Series
FUJITSU LIMITED
For further information please contact:
Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan Tel: (044) 754-3763 Fax: (044) 754-3329
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Control Law of Japan, the prior authorization by Japanese government should be required for export of those products from Japan.
http://www.fujitsu.co.jp/
North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, USA Tel: (408) 922-9000 Fax: (408) 922-9179 Customer Response Center Mon. - Fri.: 7 am - 5 pm (PST) Tel: (800) 866-8608 Fax: (408) 922-9179
http://www.fujitsumicro.com/
Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 D-63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122
http://www.fujitsu-ede.com/
Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE LTD #05-08, 151 Lorong Chuan New Tech Park Singapore 556741 Tel: (65) 281-0770 Fax: (65) 281-0220
http://www.fmap.com.sg/
F9804 (c) FUJITSU LIMITED Printed in Japan
52

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